Bugatti ain't got nothing on this V2
The Cupertino RISC-y slinger chiefly sells its product in the form of a ready-made multi-core chiplet, with the idea that customers such as hyperscalers can combine multiple chiplets in an SoC to meet their specific processing requirements.
The IOMMU specification being ratified “was a big deal in the RISC-V space,” according to Lanier. “Anytime you have a virtual machine, and you want to have direct access to one of your PCIe devices, you don't have to do all the software overhead to switch it around, so this is a critical feature for datacenter applications,” he explained.Ventana has also taken advantage of the RISC-V Vector Extension specifications to add a vector processing unit to its cores.
All of the changes in Veyron V2 translate to a performance increase of almost 40 percent over the previous generation, Lanier claimed.Veyron V2 also supports DSA, or Domain Specific Acceleration, a capability that allows the customer to add bespoke accelerator chiplets to their SoC.
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